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24-Apr-2017

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PC - M'board Socket - (P2/P3/Xeon/Celeron)

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Author: admin
Date: 23-Jan-02

[dancetech database recompiled in 1999 - some articles listed April '99 are older]


There are so many different processors, and they all fit different motherboard type connectors... I for one get tired trawling round the www trying to put it all in order mentally, so i spent the whole day collecting data to make a list... Not definitive, but includes most of the processors we would use for digital audio, and a few oldies we won't probably use much anymore.

All this page is for is so that you can checkout a chip speed and what type of board connector it takes, and for newbies to show them the different socket TYPES and the chips that go with them.

For us PC-Audio people it all starts with the MMX pentium in the olde days... and from there we've had SLOT-1 for P2 & Celeron and AMD came with the SLOT-A for their early Athlon's... The SLOT-A looks like the SLOT-1, and is 'the SLOT-1 for Athlons'...

On both types (Intel slot-1 & AMD slot-a), the CPU sits on a board enclosed in a case with cooler, that looks like a video cassette... Intel pushed the 'Slot-1' & P2 & older P3 aside and went to the New P3 & Celerons on SOCKET 370 (a ZIF socket), easy to install chips into.... the AMD K7 Athlon & Duron moved to the Socket-A. - Now we are on the next gen of P4 & Athlon... up to and above 2ghz.... we have the Athlon & Duron on SOCKET-A and the P-4 on SOCKET-423 & SOCKET-478.


This page is for the Slot-1 chips.. Pentium 2 & Celeron & Pentium 3 up to 1.13ghz... also the Pentium Zeon on Slot-2.





Slot I:





                



Intel Pentium II, Pentium III.

Developed by Intel to replace their Zero Insertion Force (ZIF) sockets. Using Slot 1, the CPU is packaged in a 242-contact Single-Edge Contact Cartridge. The cartridge may contain up to two CPUs and an L2 cache. Intel's Pentium II, Pentium III, and some Celeron processors use the Slot 1 configuration.



Pentium II/III/Celeron (Slot 1)
Intel ProcessorsNatural StateSocketsL1/L2 Cache (Associativity)Transistors
Pentium II-233 MMX
(Klamath)
May 7, 1997 - ($636)
528 pins (242 pin SEC)
233MHz (66x3.5)
2.8v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 512MB cacheable
7.5 million
0.35&##181;m process
203mm&##178; die
Pentium II-266 MMX
(Klamath)
May 7, 1997 - ($775)
528 pins (242 pin SEC)
266MHz (66x4.0)
2.8v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 512MB cacheable
7.5 million
0.35&##181;m process
203mm&##178; die
Pentium II-300 MMX
(Klamath)
May 7, 1997 - ($1981)
528 pins (242 pin SEC)
300MHz (66x4.5)
2.8v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 512MB cacheable
7.5 million
0.35&##181;m process
203mm&##178; die
Pentium II-266 MMX
(Deschutes)
September 1, 1998 - ($159)
528 pins (242 pin SEC)
266MHz (66x4.0)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
7.5 million
0.25&##181;m process
131mm&##178; die
118mm&##178; die (Aug 98)
Pentium II-300 MMX
(Deschutes)
September 1, 1998 - ($192)
528 pins (242 pin SEC)
300MHz (66x4.5)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
7.5 million
0.25&##181;m process
131mm&##178; die
118mm&##178; die (Aug 98)
Pentium II-333 MMX
(Deschutes)
January 26, 1998 - ($722)
528 pins (242 pin SEC)
333MHz (66x5.0)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* dA0 512MB cacheable
* dA1 4GB cacheable
* dB0 4GB cacheable
7.5 million
0.25&##181;m process
131mm&##178; die
118mm&##178; die (Aug 98)
Pentium II-350 MMX
(Deschutes)
April 15, 1998 - ($621)
528 pins (242 pin SEC)
350MHz (100x3.5)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
7.5 million
0.25&##181;m process
131mm&##178; die
118mm&##178; die (Aug 98)
Pentium II-400 MMX
(Deschutes)
April 15, 1998 - ($824)
528 pins (242 pin SEC)
400MHz (100x4.0)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
7.5 million
0.25&##181;m process
131mm&##178; die
118mm&##178; die (Aug 98)
Pentium II-450 MMX
(Deschutes)
August 24, 1998 - ($669)
528 pins (242 pin SEC)
450MHz (100x4.5)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
7.5 million
0.25&##181;m process
118mm&##178; die
Pentium III-450 MMX SSE
(Katmai)
February 26, 1999 - ($496)
570 pins (242 pin SEC)
450MHz (100x4.5)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III-500 MMX SSE
(Katmai)
February 26, 1999 - ($696)
570 pins (242 pin SEC)
500MHz (100x5.0)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III-533B MMX SSE
(Katmai)
September 27, 1999 - ($369)
570 pins (242 pin SEC)
533MHz (133x4.0)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III-550 MMX SSE
(Katmai)
May 17, 1999 - ($744)
570 pins (242 pin SEC)
550MHz (100x5.5)
2.0v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III-600 MMX SSE
(Katmai)
August 2, 1999 - ($669)
570 pins (242 pin SEC)
600MHz (100x6.0)
2.05v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III-600B MMX SSE
(Katmai)
September 27, 1999 - ($615)
570 pins (242 pin SEC)
600MHz (133x4.5)
2.05v/3.3v split
Slot 116KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (1/2 speed) (4-way)
* 4GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III-533EB MMX SSE
(Coppermine)
October 25, 1999 - ($305)
495 pins (242 pin SEC)
533MHz (133x4.0)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
Pentium III-550E MMX SSE
(Coppermine)
March 1, 2000
495 pins (242 pin SEC)
550MHz (100x5.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
Pentium III-600E MMX SSE
(Coppermine)
October 25, 1999 - ($455)
495 pins (242 pin SEC)
600MHz (100x6.0)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-600EB MMX SSE
(Coppermine)
October 25, 1999 - ($455)
495 pins (242 pin SEC)
600MHz (133x4.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-650 MMX SSE
(Coppermine)
October 25, 1999 - ($583)
495 pins (242 pin SEC)
650MHz (100x6.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-667 MMX SSE
(Coppermine)
October 25, 1999 - ($605)
495 pins (242 pin SEC)
666MHz (133x5.0)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-700 MMX SSE
(Coppermine)
October 25, 1999 - ($754)
495 pins (242 pin SEC)
700MHz (100x7.0)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-733 MMX SSE
(Coppermine)
October 25, 1999 - ($776)
495 pins (242 pin SEC)
733MHz (133x5.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-750 MMX SSE
(Coppermine)
December 20, 1999 - ($803)
495 pins (242 pin SEC)
750MHz (100x7.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-800 MMX SSE
(Coppermine)
December 20, 1999 - ($851)
495 pins (242 pin SEC)
800MHz (100x8.0)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-800EB MMX SSE
(Coppermine)
December 20, 1999 - ($851)
495 pins (242 pin SEC)
800MHz (133x6.0)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
90mm&##178; die (Jul 00)
Pentium III-850 MMX SSE
(Coppermine)
March 20, 2000 - ($765)
495 pins (242 pin SEC)
850MHz (100x8.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
105mm&##178; die
90mm&##178; die (Jul 00)
Pentium III-866 MMX SSE
(Coppermine)
March 20, 2000 - ($776)
495 pins (242 pin SEC)
866MHz (133x6.5)
1.65v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
105mm&##178; die
90mm&##178; die (Jul 00)
Pentium III-933 MMX SSE
(Coppermine)
May 24, 2000 - ($744)
495 pins (242 pin SEC)
933MHz (133x7.0)
1.7v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
105mm&##178; die
90mm&##178; die (Jul 00)
Pentium III-1.0B MMX SSE
(Coppermine)
March 8, 2000 - ($990)
495 pins (242 pin SEC)
1000MHz (133x7.5)
1.7v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
105mm&##178; die
90mm&##178; die (Jul 00)
Pentium III-1.0G MMX SSE
(Coppermine)
July 31, 2000
495 pins (242 pin SEC)
1000MHz (100x10.0)
1.7v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
90mm&##178; die
Pentium III-1.13G MMX SSE
(Coppermine)
July 31, 2000 - ($990) (recalled in Aug)
495 pins (242 pin SEC)
1133MHz (133x8.5)
1.8v
Slot 116KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 4GB cacheable
28 million
0.18&##181;m process
90mm&##178; die
Celeron-266 MMX
(Covington)
April 15, 1998 - ($155)
528 pins (242 pin SEPP)
266MHz (66x4.0)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
7.5 million
0.25&##181;m process
131mm&##178; die
Celeron-300 MMX
(Covington)
June 8, 1998 - ($159)
528 pins (242 pin SEPP)
300MHz (66x4.5)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
7.5 million
0.25&##181;m process
131mm&##178; die
Celeron-300A MMX
(Mendocino)
August 24, 1998 - ($149)
528 pins (242 pin SEPP)
300MHz (66x4.5)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
128KB on-Die unified L2 (4-way)
* 4GB cacheable
19 million
0.25&##181;m process
154mm&##178; die
Celeron-333 MMX
(Mendocino)
August 24, 1998 - ($192)
528 pins (242 pin SEPP)
333MHz (66x5.0)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
128KB on-Die unified L2 (4-way)
* 4GB cacheable
19 million
0.25&##181;m process
154mm&##178; die
Celeron-366 MMX
(Mendocino)
January 4, 1999 - ($131)
528 pins (242 pin SEPP)
366MHz (66x5.5)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
128KB on-Die unified L2 (4-way)
* 4GB cacheable
19 million
0.25&##181;m process
154mm&##178; die
Celeron-400 MMX
(Mendocino)
January 4, 1999 - ($166)
528 pins (242 pin SEPP)
400MHz (66x6.0)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
128KB on-Die unified L2 (4-way)
* 4GB cacheable
19 million
0.25&##181;m process
154mm&##178; die
Celeron-433 MMX
(Mendocino)
March 22, 1999 - ($177)
528 pins (242 pin SEPP)
433MHz (66x6.5)
2.0v
Slot 116KB data (4-way)
16KB instruction (4-way)
128KB on-Die unified L2 (4-way)
* 4GB cacheable
19 million
0.25&##181;m process
154mm&##178; die









Slot II:

Intel Pentium II Zeon, Pentium III Xeon.

Essentially a 330-contact version of SLot 1. The Slot 2 cartridge may house as many as four processors and an L2 cache. Intel's Xeon processor uses Slot 2.



Pentium II/III Xeon (Slot 2)
Intel ProcessorsNatural StateSocketsL1/L2 Cache (Associativity)Transistors
Pentium II Xeon-400 MMX
(Drake)
June 29, 1998 - ($1124) (512KB)
June 29, 1998 - ($2836) (1MB)
528 pins (330 pin SEC)
400MHz (100x4.0)
2.0v/2.5v split
Slot 216KB data (4-way)
16KB instruction (4-way)
512KB or
1MB unified L2 (4-way)
* 64GB cacheable
7.5 million
0.25&##181;m process
131mm&##178; die
118mm&##178; die (Aug 98)
Pentium II Xeon-450 MMX
(Drake)
October 6, 1998 - ($824) (512KB)
January 5, 1999 - ($1980) (1MB)
January 5, 1999 - ($3692) (2MB)
528 pins (330 pin SEC)
450MHz (100x4.5)
2.0v/2.7v split
Slot 216KB data (4-way)
16KB instruction (4-way)
512KB or
1MB or
2MB unified L2 (4-way)
* 64GB cacheable
7.5 million
0.25&##181;m process
118mm&##178; die
Pentium III Xeon-500 MMX SSE
(Tanner)
March 17, 1999 - ($931) (512KB)
March 17, 1999 - ($1980) (1MB)
March 17, 1999 - ($3692) (2MB)
570 pins (330 pin SEC)
500MHz (100x5.0)
2.0v/2.7v split
2.0v/2.0v split (2MB L2)
Slot 216KB data (4-way)
16KB instruction (4-way)
512KB or
1MB or
2MB unified L2 (4-way)
* 64GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III Xeon-550 MMX SSE
(Tanner - 2-way)
April 7, 1999 - ($1059)
570 pins (330 pin SEC)
550MHz (100x5.5)
2.0v/2.0v split
Slot 216KB data (4-way)
16KB instruction (4-way)
512KB unified L2 (4-way)
* 64GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III Xeon-550 MMX SSE
(Tanner)
August 23, 1999 - ($931) (512KB)
August 23, 1999 - ($1980) (1MB)
August 23, 1999 - ($3692) (2MB)
570 pins (330 pin SEC)
550MHz (100x5.5)
2.0v/2.0v split
Slot 216KB data (4-way)
16KB instruction (4-way)
512KB or
1MB or
2MB unified L2 (4-way)
* 64GB cacheable
9.5 million
0.25&##181;m process
123mm&##178; die
Pentium III Xeon-600 MMX SSE
(Cascades)
October 25, 1999 - ($505)
495 pins (330 pin SEC)
600MHz (133x4.5)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
Pentium III Xeon-667 MMX SSE
(Cascades)
October 25, 1999 - ($655)
495 pins (330 pin SEC)
666MHz (133x5.0)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
Pentium III Xeon-700 MMX SSE
(Cascades)
May 22, 2000 (1MB) - ($1177)
May 22, 2000 (2MB) - ($1980)
495 pins (330 pin SEC)
700MHz (100x7.0)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
1MB or
2MB on-Die unified L2 (8-way)
* 64GB cacheable
140 million
0.18&##181;m process
300+mm&##178; die
Pentium III Xeon-733 MMX SSE
(Cascades)
October 25, 1999 - ($826)
495 pins (330 pin SEC)
733MHz (133x5.5)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
100mm&##178; die (Jul 00)
Pentium III Xeon-800 MMX SSE
(Cascades)
January 12, 2000 - ($901)
495 pins (330 pin SEC)
800MHz (133x6.0)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
106mm&##178; die
105mm&##178; die (Mar 00)
100mm&##178; die (Jul 00)
Pentium III Xeon-866 MMX SSE
(Cascades)
March 13, 2000
495 pins (330 pin SEC)
866MHz (133x6.5)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
105mm&##178; die
100mm&##178; die (Jul 00)
Pentium III Xeon-900 MMX SSE
(Cascades)
March 20, 2001 - ($3692)
495 pins (330 pin SEC)
900MHz (100x9.0)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
2MB on-Die unified L2 (8-way)
* 64GB cacheable
140 million
0.18&##181;m process
300+mm&##178; die
Pentium III Xeon-933 MMX SSE
(Cascades)
May 24, 2000 - ($794)
495 pins (330 pin SEC)
933MHz (133x7.0)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
105mm&##178; die
100mm&##178; die (Jul 00)
Pentium III Xeon-1G MMX SSE
(Cascades)
August 22, 2000 - ($719)
495 pins (330 pin SEC)
1000MHz (133x7.5)
2.8v or 5.0v or 12.0v
Slot 216KB data (4-way)
16KB instruction (4-way)
256KB on-Die unified L2 (8-way)
* 64GB cacheable
28 million
0.18&##181;m process
100mm&##178; die














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